Big Tech capex hit $133B in Q1, up 70% y/y. GOOGL surged to a $4.65T valuation on AI cloud strength, while TSMC SoIC yield issues drag CPO forecasts. Huawei's AI chip revenue targets $12B as domestic substitution accelerates.
Big Tech spent $133B in Q1 capex, up 70% year-over-year. Combined depreciation hit $41.6B in the quarter. Server equipment depreciates over 5-6 years, locking in an earnings drag through 2030. Consensus pegs annual depreciation for MSFT, AMZN, META, and GOOGL to exceed $430B within five years, compared against $372B of combined net income just last year. They have already extended useful lives from ~4 to 5-6 years, exhausting that accounting lever. Alphabet posted a record daily market cap increase, pushing its valuation to $4.65T and nearing NVDA's $4.85T, driven by cloud and AI demand proving ROI. Applied Digital signed a 15-year lease with a second US investment-grade hyperscaler for 300 MW of critical IT load, adding $7.5B in contracted value to reach $23B+ total. Initial operations start mid-2027.
↳ Goldman Sachs advises going long hyperscalers and short semis, noting market skepticism on AI ROI is already priced into compressed valuation multiples.
Low TSMC SoIC yields are dragging down near-term 2026 Co-Packaged Optics (CPO) shipment forecasts. During Teradyne's 1Q26 review—where they beat with $1.28B revenue and 60.9% GM but guided 2Q26 revenue down 6% QoQ to a midpoint of $1.2B—management acknowledged Advantest's growing capabilities in CPO testing. Former TSMC packaging VP Douglas Yu joined MediaTek to manage mass-production risks for the first adoption of EMIB-T. Industry sources note TSMC assumed customers would not leave, but they are now rushing to fill the CoWoS gap. Goldman Sachs sees 90% upside for MediaTek (TP5000), projecting next-gen AI ASIC compute die ASPs will be multiples higher and highly GM-accretive. In test equipment, Cohu is pivoting toward AI infrastructure and High-Bandwidth Memory, targeting extreme power density with its Eclipse handler.
↳ Apple noted that leading-edge SoC capacity, not memory, is the primary constraint limiting unit shipments. TSMC fabs can break even at just 25% utilization, down from 35-40%.
Preliminary April Korea semiconductor exports show DRAM at $9.25B (+15% MoM, +83% QoQ) and SSDs at $3.84B (+20% MoM, +181% QoQ). Turing Award laureate David Patterson flagged High Bandwidth Flash (HBF) as the next major compute bottleneck after HBM. Memory Big 3 profitability is currently higher in commodity DRAM/NAND than in HBM, incentivizing suppliers to prioritize commodity production over HBM shipment mixes. Memory prices are eating into hardware capex; Qualcomm noted memory remains ultra unaffordable. In the cloud compute market, bare metal GPU providers are raising prices as AMD MI355x inventory completely sells out. One provider noted DO is pricing MI300x at $1.99/hr, a ~70% discount to H100s at $3.39/hr.
↳ Epitaxial wafer supply for leading-edge chips is tightening faster than expected. Demand for leading-edge logic (7nm and below) is modeled to reach nearly 1M wpm in CY28, representing roughly 10% of total 300mm equivalent demand. GlobalWafers, SUMCO, and Shin-Etsu stand to benefit.
AXT reports indium phosphide demand for AI optical infrastructure is accelerating faster than near-term qualified supply. Customer procurement is shifting toward multi-year allocation security, with geographic demand broadening to include China's AI optical ecosystem. Aixtron booked €171m in Q1 orders against €59m in revenue. Management sizes the optoelectronics opportunity at 80-100 G10 tools per year, roughly a €300-400m annual TAM. Monolithic Power also flagged broadening AI demand into data center networking, optical modules, and high-density power delivery.
Huawei expects AI chip revenue to reach approximately $12B this year, up from $7.5B in 2025—a jump of at least 60% driven by domestic substitution. The 950PR chip entered mass production in March, with an upgraded 950DT planned for Q4. Morgan Stanley predicts China's AI chip market will hit $67B by 2030, with 86% supplied domestically. SMIC has successfully produced early 3-nanometer test wafers. US restrictions have bottlenecked Nvidia H200 customs clearance, while Beijing mandates domestic chip adoption.
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